1. Field of the Invention
The invention relates in general to a flash memory, and more particularly to a multi-bit flash memory and a reading method thereof.
2. Description of the Related Art
A charge trapping memory utilizes a localized charge trapping layer to replace a “polysilicon floating gate” in capturing electrons or holes. This localized charge trapping layer is made of a silicon nitride material. The silicon-nitride charge trapping layer is not a conductor. So, compared the flash memory with the typical polysilicon floating gate, the electrons or holes injected into the silicon-nitride charge trapping layer theoretically cannot diffuse over the silicon-nitride charge trapping layer evenly but are concentrated on a local area, such as left and right sides in the flash memory cell. Thus, according to this property, one memory cell can store at least 2 bit of logic data.
However, some electrons or holes are not offset and remain on the silicon-nitride charge trapping layer after the memory has been programmed and erased for many times, thereby causing the variation of the threshold voltage Vt. Consequently, the data read error may occur at the next reading process.
In view of this, the data read error occurring after many times of programming and erasing processes is a problem to be solved in the associated industry.